The Chiplet designs are patented by Apple M1 Max Photos

As for the new M1 Max silicon, it appears that Apple has kept the watch secret. Allowing the company to assemble multiple die numbers in a chiplet-based design, new images of the chiplet background show that you can actually have an interconnect bus that allows Multi-Chip-Module (MCM) upgrades . With as many as 40 CPU cores and 128 GPU cores, it can lead to chips.

Apple has not yet confirmed offers for chiplet-based designs, but the M1 Max could be scientifically integrated into the “M1 Max Duo” or even a “M1 Max Quadra” setup, according to persistent reports of many models M1 based on chiplet in the future. .

Apple has managed to impress the world not once but twice already with the performance of Arm-based M1 CPUs. The company’s new M1 Max chip is capable of computing itself – the 57 billion gargantuan transistors allow Apple to scale up to 10 CPU cores and maybe 24 or 32 GPU cores (depending on the configuration you get ), all in a 5nm chip. Incorporating domains for a chiplet-based design will have a profound effect on multiplying sources, and therefore performance.

The interconnect bus will allow Apple to measure its chips by “gluing together” the appropriate number of M1 Max chips. But, therefore, it is not a matter of rolling one M1 Max and matching one with another; Apple will also have to use specific interposer and box options for a chiplet-based design.

Surprisingly, Apple’s M1 Pro chip (which matches between M1 and M1 Max SoCs) does not have an interconnect bus – it actually comes in the widest half of the M1 Max (a beefier version of the M1 Pro). This could mean that Apple only expects users who need additional image processing capabilities in its M1 Max (such as graphics or television theaters) to need further performance improvement through this chiplet design knowledge.

The dual core 520 mm ^ 2 Apple M1 Max dies in a single “M1 Max Duo” can deliver up to 20 CPU cores and 48 or 64 GPU versions. It will also require double the system memory to 128 GB. Memory bandwidth should also be limited in such a system, up to 800 Gb / s. That seems to be working within the current M1 Max design, although the 10,040 mm ^ 2 of Apple Minerals will be more expensive, of course.

Going for the M1 Max Quadra solution with 40 CPU cores and 128 GPU cores will be even more complicated. Perhaps the integrated I / O, as the source suggests, is a perfect solution, but the probabilities increase. Apple can also support intermittent bandwidth through AM / Infinity I / O technology. Whether or not large chips will require death I / O is an open question, as other dancers have suggested the design would expand in a monolithic shape.

It is unclear at last how Apple will choose to maximize memory bandwidth – and any solution would have greatly increased the platform’s development costs throughout. But then again, these “M1 Max Duo” and “M1 Max Quadra” products will cater to a market that cares more about performance and power than cost.

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